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VCSEL器件结构设计需要满足铯原子钟在高温下稳定工作并获得较低阈值电流,器件外延结构主要包括:底部反射镜为 37.5 对Si掺杂Al0.12Ga0.88As/Al0.9Ga0.1As N型DBR层;有源区为 3 对未掺杂的 AlGaAs/GaInAs 量子阱层;氧化层厚度为 30 nm 的Al0.98Ga0.02As层;顶部反射镜为 22.5 对C掺杂的Al0.12Ga0.88As/Al0.9Ga0.1As P型DBR层。整体外延结构是在N型GaAs衬底上通过金属有机化学气相沉积(MOCVD)制备获得。器件结构示意图如图1所示。
将量子阱阱宽设计为 5 nm,势垒宽 8 nm, 以满足其低阈值激射条件。采用常温下腔模增益与材料增益失谐设计,保证在高温下实现器件稳定工作。通过 Crosslight 公司的 PICS3D软件进行腔模与增益仿真,结果如图2 所示,图2(a)为不同腔模失配下有源区增益随温度变化的特性曲线,常温下设置材料增益波长为 880 nm,在不同失谐量(∆λ = 0~28 nm)下其增益峰值将随温度增加而发生红移,增益峰值波长温漂速度为 0.3 nm/℃。图2(b)中蓝色线为腔模随温度漂移的变化曲线,可得腔模温漂速度约为 0.063 nm/℃。当腔模与有源区增益失谐量为 12 nm 时,在环境工作温度约为 60 ℃ (340 K)时材料增益具有最大值。此时,对应的腔模为 894.6 nm,峰值材料增益波长与腔模波长的一致性保证了器件在高温下能够稳定工作,且输出波长约为 894.6 nm。因此,将外延结构设计为失谐 12 nm以满足器件工作需求,获得稳定的铯原子吸收谱线。
图 2 模拟有源区增益与腔模随温度的变化
Figure 2. Simulation results of active region gain and cavity mode changes under different temperatures
此外,分析VCSEL器件模式以满足基横模输出,通过麦克斯韦方程组及边界条件,可以得到圆柱坐标下光波在Z轴传播方向的电场Ez的波动方程[18-20]:
$$ \frac{{\partial }^{2}{E}_{{\textit{z}}}}{\partial {r}^{2}}+\frac{1}{r}\frac{\partial {E}_{{\textit{z}}}}{\partial r}+\frac{1}{{r}^{2}}\frac{{\partial }^{2}{E}_{{\textit{z}}}}{\partial {r\varphi }^{2}}+\frac{{\partial }^{2}{E}_{{\textit{z}}}}{\partial {{\textit{z}}}^{2}}+{n}^{2}{{k}_{0}}^{2}{E}_{{\textit{z}}}=0 $$ (1) 同理也可得到对应Hz的波动方程。
定义参数:
$ {u}_{mn}\;=\;{({\left({n}_{eff1}{k}_{0}\right)}^{2}\;-\;{\beta }^{2})}^{1/2} $ ,$ {\nu }_{mn}\;=\; {({\beta }^{2}\;-} {{{n}_{eff2}}^{2}{k}_{0}^{2})}^{1/2} $ ,$ {k}_{0} $ 为真空中的传播常数,$ {n}_{eff1} $ 为芯层有效折射率,$ {n}_{eff2} $ 为包层有效折射率,$\; \beta $ 为传播常数。通过分离变量及边界方程求解,可得波导模式在不同介质层上的电磁场分布:
$$\begin{split}& \left[\begin{array}{c}{E}_{{\textit{z}}1}\\ {H}_{{\textit{z}}1}\end{array}\begin{array}{c}{E}_{{\textit{z}}2}\\ {H}_{{\textit{z}}2}\end{array}\right]=\left[\begin{array}{cc}A& B\\ C& D\end{array}\right]\cdot\\ &\left[\begin{array}{c}{J}_{m}\left(ur\right)\mathrm{exp}\left(im\varphi \right)\mathrm{exp}\left(i\beta {\textit{z}}\right)\\ 0\end{array}\begin{array}{c}0\\ {K}_{m}\left(vr\right)\mathrm{exp}\left(im\varphi \right)\mathrm{exp}\left(i\beta {\textit{z}}\right)\end{array}\right]\end{split} $$ (2) 式中:
$ {E}_{z1} $ ,$ {H}_{z1} $ 为芯层($ r\leqslant {r}_{OA} $ )场分布;$ {E}_{z2} $ ,$ {H}_{z2} $ 为包层 ($ {r}_{OA} < r < R $ )场分布,$ {r}_{OA} $ 为氧化孔径大小,R为VCSEL大台面半径;$ {J}_{m} $ 、$ {K}_{m} $ 分别为第一类贝塞尔函数和第二类贝塞尔函数,m为阶数。A、B、C、D四个常数过E和H的切向分量在芯、包层界面的连续性边界条件来确定。通过麦克斯韦方程组,用Ez与Hz表示柱坐标下芯层电磁场的分量:$$ {E}_{r}=\frac{i}{{u}^{2}}\left(\beta \frac{\partial {E}_{{\textit{z}}}}{\partial r}+{\mu }_{0}\frac{\omega }{r}\frac{\partial {H}_{{\textit{z}}}}{\partial \phi }\right),{E}_{\phi }=\frac{i}{{u}^{2}}\left(\frac{\beta }{r}\frac{\partial {E}_{{\textit{z}}}}{\partial \phi }-{\mu }_{0}\omega \frac{\partial {H}_{{\textit{z}}}}{\partial r}\right) $$ $$ {H}_{r}=\frac{i}{{u}^{2}}\left(\beta \frac{\partial {H}_{{\textit{z}}}}{\partial r}-{\epsilon }_{0}{n}^{2}\frac{\omega }{r}\frac{\partial {E}_{{\textit{z}}}}{\partial \phi }\right),{H}_{\phi }=\frac{i}{{u}^{2}}\left(\frac{\beta }{r}\frac{\partial {H}_{{\textit{z}}}}{\partial \phi }+{\epsilon }_{0}{n}^{2}\omega \frac{\partial {E}_{{\textit{z}}}}{\partial r}\right) $$ (3) 同理,以
$ -{v}^{2} $ 代替$ {u}^{2} $ 取值,可得包层电磁场分布。通过求解E和H分量在包、芯层界面的连续性,得到A、B、C、D满足的四个齐次方程,当系数矩阵行列式相互抵消时才可获得特殊解,该条件下可得特征方程[21-22]:$$ \begin{split}&\left[ \frac{{J}_{m}'\left(u{r}_{OA}\right)}{u{J}_{m}\left(u{r}_{OA}\right)} + \frac{{K}_{m}'\left(v{r}_{OA}\right)}{v{K}_{m}\left(v{r}_{OA}\right)} \right]\left[ \frac{{J}_{m}'\left(u{r}_{OA}\right)}{u{J}_{m}\left(u{r}_{OA}\right)} + \frac{{n}_{eff2}^{2}}{{n}_{eff1}^{2}}\frac{{K}_{m}'\left(v{r}_{OA}\right)}{v{K}_{m}\left(v{r}_{OA}\right)} \right] =\\& \frac{{m}^{2}}{{{r}_{OA}}^{2}}\Bigg(\frac{1}{{u}^{2}}+\frac{1}{{v}^{2}}\Bigg)\Bigg(\frac{1}{{u}^{2}}+\frac{{n}_{eff2}^{2}}{{n}_{eff1}^{2}}\frac{1}{{v}^{2}}\Bigg)\\[-12pt] \end{split} $$ (4) 式中:当
$ v=0 $ 或$ \; \beta /{k}_{0}={n}_{eff2} $ 时模式达到截止频率,可得到$ u $ 的值,此时定义为一个参数V,由公式:$$ V=k{r}_{OA}\sqrt{{n}_{eff1}^{2}-{n}_{eff2}^{2}} $$ (5) 该参数称为归一化频率
$ V $ 参数。此外,引入一个归一化传播常数:$$ F=\frac{\beta /{k}_{0}-{n}_{eff2}}{{n}_{eff1}-{n}_{eff2}} $$ (6) 取不同m与n值求解上述特征方程(4),可以得到不同阶数模式下F随V变化的函数,单模条件下的导波模式只有HE11模式存在,即基模状态,此时TE01和TM01模式的截止由V值决定。在公式(4)中取m=0,得到两模态特征值方程为:
$$ \left\{\begin{array}{l}u{J}_{0}\left(u{r}_{OA}\right){K}_{0}'\left(v{r}_{OA}\right)+v{J}_{0}'\left(u{r}_{OA}\right){K}_{0}\left(v{r}_{OA}\right)=0\\ u{{n}_{eff2}^{2}J}_{0}\left(u{r}_{OA}\right){K}_{0}'\left(v{r}_{OA}\right)+v{n}_{eff1}^{2}{J}_{0}'\left(u{r}_{OA}\right){K}_{0}\left(v{r}_{OA}\right)=0\end{array}\right. $$ (7) 当
$ v=0 $ 且$ u\cdot {r}_{OA}=V $ 时,两种模式都将被抑制,截止条件为$ {J}_{0}\left(V\right)=0 $ ,此时$ V $ 的最小值为2.405。所以需要满足归一化频率$ V < 2.405 $ ,此为单模态条件。$ {n}_{eff1} $ 取值约为3.3,包层与芯层有效折射率差$ {\Delta n}_{eff} $ 为0.01~0.02,因此,通过公式可得氧化孔直径需满足3 μm以内。在器件制备氧化工艺过程中将严格控制氧化孔径,以实现VCSEL器件基横模稳定工作。
Study of high-temperature operating oxide-confined 894 nm VCSEL with fundamental transverse mode emission
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摘要: 针对芯片原子钟(铯)用激光光源系统对垂直腔面发射激光器(VCSEL)模式及工作温度的需求,研制出可以高温工作的氧化限制型基横模 894.6 nm VCSEL。通过缩小VCSEL氧化孔直径至3 μm,限制VCSEL高阶横模激射,保证器件基横模低阈值电流工作。通过常温下腔模与材料增益失谐12 nm 的结构设计,使器件能够在50~65 ℃ 高温时,激射波长对准原子能级且工作模式稳定。实验所制备的VCSEL在工作温度为55 ℃、注入电流1.8 mA 时,激射波长达到 894.6 nm,边模抑制比(SMSR)大于35 dB,基横模功率为0.75 mW,具有11.4°的远场发射角。当温度为65 ℃时,器件SMSR大于25 dB,基横模功率大于0.1 mW。该高温基横模工作的VCSEL在芯片原子钟中具有重要的应用前景。Abstract: Aiming at the requirements of the mode and operating temperature of vertical-cavity surface-emitting laser (VCSEL) used as the laser source system of the atomic clock (Cesium) chip, the 894.6 nm oxide-confined fundamental transverse mode VCSEL that could operate at high temperature was reported. By reducing the diameter of the oxide aperture of the VCSEL to 3 μm, the higher order transverse modes could be suppressed, which guaranteed the fundamental transverse mode and low threshold current of the VCSEL. Through the structural design that the cavity mode and the material gain was detuned by 12 nm at room temperature, the emission wavelength of the device could match with the atomic energy level and the operating mode was stable at a high temperature of 50-65 ℃. The obtained VCSEL shows a center wavelength of 894.6 nm, a side mode suppression ratio (SMSR) larger than 35 dB, a fundamental transverse mode power of 0.75 mW and a far-field divergence angle of 11.4° when the operating temperature is 55 ℃ and the injection current is 1.8 mA. At the temperature of 65 ℃, the SMSR is larger than 25 dB and transverse mode power is larger than 0.1 mW. The development of the high temperature fundamental transverse mode VCSEL has great potential in chip atomic clocks.
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