基于线阵CCD 的高速光刻检焦技术

High-speed focusing technique for lithography based on line scan CCD

  • 摘要: 随着光学投影光刻分辨力的提高,投影物镜的焦深在逐渐缩短。为充分利用物镜有限的焦深,一般采用调焦技术来调整硅片位置。作为调焦的关键,检焦技术的研究尤为热门。现有的检焦方法多采用四象限探测器或者面阵CCD采集携带有硅片离焦量信息的光强信号,并在计算机上进行图像处理完成检焦。该方法处理速度慢,难以满足实时调焦的要求。鉴于此,提出了一种用线阵CCD采集图像,以FPGA为处理器的检焦方法。该方法利用线阵CCD的高速性和FPGA的并行性,结合多项式插值的亚像素边缘检测算法,能够高速实时检测硅片离焦量;同时, FPGA通过驱动电机控制工件台运动对离焦量进行补偿,形成一个实时闭环的调焦系统,减少了原有的计算机环节,具有高速度、高分辨率、低功耗、低成本的特点。

     

    Abstract: With the improvement of lithograph resolution, the depth of focus (DOF) of lithographic projection objective is decreasing. In order to take full advantages of the restricted DOF, focusing is commonly used to adjust the wafer onto the ideal focal plane. As the key point of focusing, research on focus detection becomes very popular. The present focus method is based on four-quadrant detector or array CCD to grab light signal, which carries the defocusing amount information of the wafer, and then process image on computer. This method is slow and cannot satisfy the real-time requirement for focusing. Therefore, a focus detection method, which wass based on line scan CCD for image grabbing and FPGA for image processing, was provided. This method can detect the defocusing amount in high-speed by utilizing the high-speed of line scan CCD and FPGA's parallelism, combining with sub-pixel boundary detection algorithm based on polynomial interpolation. In order to compensate the defocusing amount, FPGA directly control the motor to drive the wafer stage up and down, making the focusing system a real-time closed loop. Due to reducing the computer links, this design has high-speed, high-resolution, low power consumption and low-cost characters.

     

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