Abstract: The guided filter is an edge preserving filter proposed in recent years, which can be broadly used in many image processing applications such as smoothing, detail enhancing, dehazing, etc. A high performance VLSI (Very Large Scale Integration) architecture of guided filter for single image was proposed. The architecture of the guided filter was fully pipelined, which can process images at the speed of nearly one pixel/cycle, without any off-chip memory. Moreover, a method which enable the size of the filtering window to be flexibly changed at run time was achieved. The architecture was implemented on FPGA of Altera's Cyclone Ⅲ and synthesis result shows that the requirement of logic elements and memory is acceptable for low-end FPGAs. Additional experimental results show that the proposed architecture is capable of processing video with dimension of 1 024 by 1 024 at the frame rate of 100 FPS. The architecture can be used as accelerator card for PC or front end of embedded systems for different kinds of real-time image processing tasks.