High-performance VLSI architecture for traffic sign detection

Traffic sign detection is an important function for driver assistant systems, but the high real-time requirement makes it a very challenging task. A high-performance prohibitory traffic sign detection VLSI (Very Large Scale Integration) architecture was presented. Both color and shape characteristics were utilized in the proposed architecture by detecting circles using circular Hough transform in the red edge bitmap. The local property of circular Hough transform was exploited so that the memory requirement was significantly reduced comparing with common architecture. All the radii were voted concurrently to make full use of the parallelism of logic elements and memory in FPGA. The proposed architecture was implemented on Altera's EP3C55F484C6 FPGA. The maximum frequency of the implementation was 122 MHz and the resource requirement was acceptable. Experimental results show that the architecture can achieve a throughput up to 115 M pixels/s and was robust to adverse situations such as bad lighting condition, partial occlusion, multiple signs clustered and similar background color.