Objective Currently, 3D image sensors based on time-of-flight ranging have been widely used in military and civil applications, such as astronomical detection, target identification, and unmanned vehicles. They are currently being developed in the direction of high sensitivity, high accuracy, and low power consumption in the future. Hybrid time-of-flight ranging, which can achieve high accuracy and high range of lidar ranging, is based on the principle of indirect time-of-flight ranging while incorporating the notion of direct time-of-flight ranging. It has become one of the development paths of time-of-flight ranging. For this purpose, a hybrid ranging model and a 5×5 array readout circuit with 50 µm center distance are designed based on an APD in linear mode as the detector.
Methods A two-segment, two-phase hybrid ranging model is built in this paper (Fig.4). Based on this model, the time-of-flight solution was implemented and the error of background light and counter clock frequency was simulated (Fig.6-7). In order to adapt to the model, the readout circuit selects Capacitor Feedback Transimpedance Amplifier (CTIA) as the input stage, outputs a voltage signal through a sample-and-hold circuit, and generates an 8-bit digital signal through a positive feedback comparator and True Single Phase Clock counter (Fig.3). The accuracy of intensity information is determined by calculating the linearity of the analog voltage output (Fig.9). The accuracy of distance measurement is analyzed by combining analog and digital signals, calculating the time of flight in the vicinity of 108.75 m, and comparing the result to the ideal value (Fig.10).
Results and Discussions The hybrid ranging readout circuit can be passively integrated over a range of 0.5 V to 2.5 V with high injection efficiency. CTIA output voltage has 99.83% linearity (Fig.9). In the hybrid ranging simulations over a range of 108.75 m, the K values were correctly determined for most subperiods. The maximum and average errors in the last subperiod are 11.355 cm and 4.415 cm respectively (Fig.10). This error can be greatly reduced by optimizing the data at the first and last ends. Performance of the readout circuit meets design requirements. The simulation results of the main parameters are compared with the advanced designs at home and abroad in various ranging modes (Tab.1). It can be seen that the small array readout circuit based on LM-APD in the paper achieves a much higher range than indirect ranging at a lower modulation frequency using a medium process. It also achieves a higher accuracy with a very low counter cost and good linearity compared with the direct ranging scheme. It provides a hybrid ranging scheme that can be applied to near-medium range.
Conclusions In this study, a hybrid ranging model is established and systematically analyzed by combining the advantages of direct ranging and indirect ranging. Based on the model, the intensity of reflected background light and continuous pulse light can be found. By using LM-APD, a 5×5 array with 50-μm pixel center distance two-stage two-phase hybrid ranging readout circuit is designed. It consists of two sub-frames of phase in a single frame, with two steps of integration process in each sub-frame. Both a voltage analog output and an 8 bit counter digital output are available from the readout circuit, which employs CTIA as its input stage. Simulation results show that the analog output achieves 99.83% linearity at a modulation frequency of 20 MHz, and the readout circuit achieves a maximum error of 11.355 cm and an average error of 4.415 cm over a hybrid ranging range of 108.75 m. It extends the range to 29 times that of pure indirect ranging, and the readout circuit has great potential for key performance such as accuracy and range. The preliminary simulation results have shown the advantages of hybrid ranging and verified the feasibility of the hybrid ranging model, providing a theoretical and circuit reference for the design of a larger-scale infrared focal plane 3D imaging readout circuit. Further validation and improvement are pending after the flow of the chip.
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