Objective High dynamic range (HDR) is an important requirement of the advanced Infrared Focal Plane Array (IRFPA). It is limited by the small electric charge capacity and noise of readout integrated circuit (ROIC). One of the common strategies to expand electric charge capacity is well capacity adjusting based on selectable integration capacitors. The other method is multiple sampling implemented by analog-digital converter (ADC) in conjunction with time delay and integration (TDI) technique. However, capacitors and ADC occupies large area, and TDI causes low frame frequency. Correlated double sampling (CDS) is commonly used to reduce low-frequency noise and KTC noise. Nevertheless, the fold effect of CDS due to large-signal saturation, which leads to wrong readout of large-signal, lacks analysis and elimination. Therefore, it is necessary to propose a new structure to enhance the charge capacity in small pixel area and incorporate CDS guaranteed large-signal readout. For this purpose, an adaptive-gain ROIC (AGROIC) integrated with anti-fold CDS (AFCDS) is designed in this paper.
Methods The AGROIC and AFCDS is constructed in this paper. AGROIC is accomplished by CTIA in parallel with a MOSFET Mag whose gate voltage is adjustable (Fig.2). The small-signal is integrated through a large-gain CTIA with small capacitor, while the large-signal is injected through the MOSFET, which convert CTIA to RTIA. The conversion gain of ROIC is transformed from the ratio of time to integral capacitance to the reciprocal of the transconductance (Fig.3). The CDS fold effect is caused by saturation of input signal (Fig.7). A fully-passive CDS connected with a MOSFET switch Maf is combined with AGROIC to suppress noise of small-signal (Fig.8). In contrast, the switch turns on in response to large-signal resulting in direct injection to the sampling capacitance (Fig.9).
Results and Discussions The proposed AGROIC and AFCDS are integrated in 15 µm pixel pitch, designed in 180 nm 3.3 V CMOS process. The simulation results demonstrate the aforementioned analysis (Fig.4, Fig.11). A 640×512 FPA ROIC is designed and fabricated, which consists of AGROIC-AFCDS input stage, control register, time sequence generator, column buffer, multiple outputs, etc. (Fig.12-13). The tests of the designed system are based on an IRFPA testing platform combined with signal generation, clock generation, voltage source, LABVIEW software and signal acquisition (Fig.15). The noise electrons are significantly decreased to 17 e− because of the CDS in pixel (Fig.17). The conversion relationship between injection current and output voltage extremely decreases when the input signal is large enough to turn on Mag, which increases the charge handle capacitance to 1.6 Me− under finite output swing (Fig.18). Therefore, the dynamic range of this circuit is improved to 99.66 dB. Besides, the testing results present the fold effect on condition of turning off Maf and improper gate-voltage setting (Fig.19). The appropriate setting can eliminate the CDS fold effect.
Conclusions A 640×512, 15 µm pixel pitch ROIC incorporated with adaptive-gain ROIC and anti-fold CDS is designed and implemented. A new approach to realize gain adaptation is proposed as follows. The ROIC automatically converts from high-gain CTIA to low-gain RTIA depending on the magnitude of the signal, which ensures high sensitivity readout of small-signals and expands the detection range. The design is suitable for complex small-signal application, such as hyperspectral imaging applications with weak radiation and large differences between elements. The design requires small integration capacitance and can be applied to smaller pixel area. Besides, the fold phenomenon of CDS under large signal is analyzed, and a concise solution is proposed. The designed AGROIC-AFCDS eliminates the fold effect of CDS, suppress the noise to 17 e−, expands the maximum detectable charge to 1.63 Me−, and improves the dynamic range to 99.66 dB. It is a new method to realize HDR in small pixel area which can adapt to the advanced infrared focal plane technology.