Improved readout circuit with BDI structure for VLWIR FPAs

A 3232 readout integrated circuit (ROIC) for very long wavelength (VLWIR) detector was designed, which uses buffered direct injection (BDI) unit cell as input circuit to reduce the input resistance, increase the injection efficiency of signal current, and provide precise biasing voltage to the detector. Due to very low output impedance of VLWIR detectors, a high gain feedback amplifier was used to provide the inverting gain by a differential stage. By means of novel current mode background suppression, the integration time and the signal-to-noise ratio (SNR) of image data was increased when VLWIR FPAs run at high background environment. At the same time, better contrast and dynamic range was also achieved. The final chip was fabricated with HHNEC CZ6H 0.35 m 1P4M process technology. The test results show that the output dynamic range is over 2.0 V, the linearity could reach up to 99%, the readout frequency is more than 2.5 MHz, the RMS noise is less than 0.3 mV, and the power dissipation is less than 100 mW when the ROIC operates at the temperature of 50 K.